2. For the following questions please use the following latencies and issues data for operations Integer Double Precision Operation Addition Multiplication Latency Issue Capacity Latency Issue Capacity 4 We also assume a superscalar machine with 8 function units of the following capabilities Functional Unit 1: Integer arithmetic, floating point multiplication, integer and floating point division, branches Functional Unit 2:Integer arithmetic, floating point multiplication, integer and floating point division Functional Unit 3: Load Unit(Load latency: 4 cycles), address computation Functional Unit 4: Load Unit(Load latency: 4 cycles), address computation Functional Unit 5: Store Unit. Functional Unit 6: Integer arithmetic Functional Unit 7: Integer arithmetic, branches Functional Unit 8: Store Unit, Address computation Consider the following implementation of the inner product of two vectors u and v 0 void inner4(vec_ptr u, vec_ptr v, data_t *dest) long i; 3 long lengthvec_length(u); 4data_t udata-get_vec_start(u); 5 data_t vdata- get vec_start (v) data-t sum (data-t )0; 7 for (i-0; i