2. Psuedo-Instructions (25 points). Consider the case of the MIPS ulw instruction that stores a word to an unaligned memory address (e.g., a word stored to the address 0x 10010003). ulw is not supported in hardware, rather it is a pseudo-instruction (a) (15 points) Support ulw in software. First, finish labelling the memory diagram provided and shade in the bytes you are intending to load (you may assume either endianness). Second, using only the basic arithmetic, logical, and shift instructions, along with lw provide nstance that corresponds to the following ulw instruction a sequence of instructions ulwSad, 3($t0) # same operands as 1w expects # you may assume $t0's value is # 0x10010000 Word Address Byte Byte |Byte | Byte 0x10010000 (b) (10 points) Why does the MIPS ISA not implement a ulw instruction? Provide a technical reason. [Hint: think about how you 'd have to modify your Lab 4 datapath to support this.j 2. Psuedo-Instructions (25 points). Consider the case of the MIPS ulw instruction that stores a word to an unaligned memory address (e.g., a word stored to the address 0x 10010003). ulw is not supported in hardware, rather it is a pseudo-instruction (a) (15 points) Support ulw in software. First, finish labelling the memory diagram provided and shade in the bytes you are intending to load (you may assume either endianness). Second, using only the basic arithmetic, logical, and shift instructions, along with lw provide nstance that corresponds to the following ulw instruction a sequence of instructions ulwSad, 3($t0) # same operands as 1w expects # you may assume $t0's value is # 0x10010000 Word Address Byte Byte |Byte | Byte 0x10010000 (b) (10 points) Why does the MIPS ISA not implement a ulw instruction? Provide a technical reason. [Hint: think about how you 'd have to modify your Lab 4 datapath to support this.j