2.11. In a non-pipelined machine, time between instructions is 10nsec. If we use pipelining with five stages such that all stages are balanced. What is time between instructions after pipelining? a) 4 nsec. b) 2 nsec. c) 5 nsec. d) 10 nsec. 2.12. Assume that register $t1 is initialized to the value 3 . What is the value in register $s2 after running the following MIPS code assuming $s2 is initially zero? i+s2=0and$t1=31OOR:slt$t2,$0,$t1beq$+2,$0,DONEaddi$t1,$t1,1addi$52,$52,2I.LoOP Done: b) 2