2-4

9. Suppose the memory cells at addresses Co to C6 in the machine described in Appendix C contain the bit patterns described in the following table. Address Contents CO 2A CI 78 C6 00 C6 00 If we start the machine with its program counter containing Co, (1) List the addresses of the memory cells that contain the program that will be executed. (points) CO, CI, C2, C3, C4 (2) Translate the instructions in the above program into English. (5 points each) The 1' instruction in English: The 2 instruction in English The 34 instruction in English: (3) Record the contents of the Instruction Register, Program Counter, the register A, and memory cell C6 as following. Then decode each instruction. (2 points each) At the end of the fetch step of the 1" machine cycle IR PC memory cell C6 Decode: (m) At the end of the fetch step of the machine cycle IR PC Register A Decode: (m) At the end of the fetch step of the 3 machine cycle IR PC memory cell C6 Register A Decode: (4) List the addresses of the memory cells that are used to hold data. 64 points) The Machine Language in Appendix C IRXY LOAD the register R with the bit pattern found in the memory cell whose address is XY 2RXY LOAD the register R with the bit pattern XY. 3RXY STORE the bit pattern found in register R in the memory cell whose address is XY 4ORS MOVE the bit pattern found in register R to register S. SRST ADD the bit patterns in register S and T and as though they were two's complement representations and leave the result in register R. 6RST ADD the bit patterns in register S and T and as though they represent values in floating-point notation and leave the result in register R 7RST OR the bit patterns in registers S and T and place result in register R. SRST AND the bit patterns in registers S and T and place result in register R 9RST XOR the bit patterns in registers S and T and place result in register R AROX ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low order end at the high order end. BRXY JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in the register number 0. Otherwise, continue with normal sequence of execution. C000 HALT execution Hexadecimal table Hexadecimal Bit Pattern Representation Bit Pattern Hexadecimal Representation 0 1 8 0000 0001 0010 0011 0100 0101 0110 0111 3 4 5 6 7 1000 1001 1010 1011 1100 1101 1110 1111 A B D F