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28. (12 points) Consider a system with an Ll cache, and paging-based virtual memory. The system doesn't have a TLB. Paging is implemented through 2-level

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28. (12 points) Consider a system with an Ll cache, and paging-based virtual memory. The system doesn't have a TLB. Paging is implemented through 2-level hierarchical page tables. All page tables are always in the main memory. Ll cache access time: 2 ns L1 cache hit ratio: 97% Memory access time: 30 ns Page fault overhead: 100 ms Page fault rate: 0.0005 What is the effective memory access time in this system? Show your work. (The page fault overhead includes the final memory access time as well as the time needed to access and update the page tables/L1 cache, in addition to disk transfer time. Assume that the page table entries are not stored in the L1-cache

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