3. (10 pts) Briefly answer the following questions worse performance? (1pts) You are inventing your own ISA. You decide all instructions should have the same length and encoding format. Assume that all your instructions use MIPS's I-type encoding format. What is the maximum number of different instructions of your ISA? Why? b. (Opts) Why ltw and sw are encoded using 1-format instead of R-fomat? ie, what s the benetite? c. d. (5pts) Mark each question as True/False (T/F) A 16-bit immediate value can be assigned to the register hi using a MIPS instruction. The "jump" operation of a branch/jump instruction is completed by changing the value of PC In MIPS, you cannot use a single instruction to add a register and a memory operand. A 32-bit value in memory can be loaded into a register by a single MIPS instruction. In MIPS, each memory location is a word (32-bit). After executing the instruction: Iw St5, 4(Sa0), the value of St5 is equal to Sa0+4. A computer consists of the following three major components: CPU, memory, input/output. SPEC benchmarks are always used for computer performance evaluation in computer industry A 8kB memory requires 13 bits of address. According to memory alignment requirement, memory address must be a multiple of data size. S instruction sw Ss5, 3(Sal) is invalid since the offset is not a multiple of 4. e. (2pts) Cirele the features that belong to CISC: (a) Variable-length instructions (c) Many addressing modes (e) Smaller CPI (g) Fast decoding of instructions. (b) Only load-store access memory (d) Fewer operations (f) Smaller instruction count (h) Two-address architecture