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3 . 3 DATAPATH DESIGN For the successful operation of a 4 - bit Smart Climate Control system, the Datapath needs specific logic components such
DATAPATH DESIGN
For the successful operation of a bit Smart Climate Control system, the Datapath needs specific logic
components such as a to Line decoder, four bit AND gates, six bit to Multiplexers, five bit
registers, two bit to Multiplexers, and a bit Control and Calculation Unit CCU illustrated in Figure
Figure : SCCS FSM & Datapath
Every logic block in the Datapath needs to be individually designed and simulated before being integrated
into the toplevel design. The connections between each logic block must be established in the toplevel design,
SCCSDATAPATH, using a hierarchical design approach.
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You are required to develop parameterized Verilog code to define your Datapath. The CLK and other
control signals should come from the FSM
The FSM control signals and Datapath operations:
wrtaddr signal provides an address to activate the required register as stated in Table
Table : to Decoder Operation.
wrtaddr Registers
A B REG REG REG REG
ToggleTH is used to switch between temperature and humidity settings.
The wrten signal collaborates with wrtaddr and ToggleTH to choose either a new value or retain
the previous value of TemperatureHumidity
Inputsel is used to select either the Sensor value or the Userdefined value. Please note that in our
bit datapath, these values range between and
The loaddata signal selects either the output of the input selection mux or the CCU output result.
The rdaddr and rdaddr signals specify the register addresses necessary for executing the CCU
operation between two registers using the provided ccuopcode. The CCU must be designed to perform
the operations outlined in Table You can use the behavioural approach to design the CCU.
Table : CCU Opcodes and Instructions.
aluopcode Opr Opr Op Instruction
noop
xx set Rxx
xx increment Rxx Rxx
xx decrement Rxx Rxx
xx load Rxx Datain
xx store Dataout Rxx
xx yy compare Rxx CRxxRyy
xx yy copy Rxx Ryy
Please note that these signals must be used in Datapath testbench to test all possible conditions required to
perform operations for SCCS
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FSM DESIGN
The control unit for this Datapath will be managed by the SCCSFSM which comprises two main
subcomponents: FSM and FSMDECO.
The SCCSFSM will be equipped with seven external inputs: START, TOGGLE, LED Flags
indicating the Sensor and User value comparison result CLK RESET and one output DONE to indicate
that the operation is complete. The FSM takes these inputs and carries out all necessary control functions and
generates three outputs: opcode, operand and operand
The FSMDECO will then utilize these three outputs for decoding, following the guidelines outlined in
Table The FSMDECO's output will be key in steering the Smart Climate Control system via the Datapath,
as illustrated in Figure
Table : FSMDECO Operations.
Op opcode Opr Opr ALU Rdaddr Rdaddr wrtaddr wrten loaddata Inputsel
noop
set xx xx
inc xx xx xx
dec xx xx xx
load xx xx or
store xx xx
compare xx yy xx yy xx
copy xx yy yy Xx
Figure : SCCS Hardware Algori
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