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3. A programmable logic array (PLA) has the design shown in Figure 5: VCC VCC P1 P2 P3 Fi P4 A B X Y Z

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3. A programmable logic array (PLA) has the design shown in Figure 5: VCC VCC P1 P2 P3 Fi P4 A B X Y Z Figure 5 a) Briefly explain why PLA is advantageous in the VLSI scenario. (2 marks) b) Deviate Boolean expressions for P1, P2, P3, P4, X, Y, and Z as functions of A, B and C. (6 marks) c) Redesign above PLA structure to implement the following expression. You need to clearly label the changes you made to the design. X = AC + ABC + ABC, Y = ABC + AB + C C = AC + AB

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