3. Answer the following questions related to reference addresses:

a. Given a 64-byte cache block, a 4 KB direct-mapped cache (assume byte-addressable), and a 32-bit address reference, which bits would be used for tag, index, and offset.

b. Given a 128-byte cache block a 2 MB 4-way set associative cache (assume byte-addressable), and a 24-bit address reference, which bits would be used for tag, index, and offset.