3. Assume we have a 4-way set associative cache with 16 byte blocks (Memory is byte addressable). The cache uses a Least Recently Used replacement policy and write back write policy. For simplicity, we will say the total cache size is 128 bytes. Answer the following questions about this cache. Assume each address is 8 bits total.

How long is the tag field of this cache?

How long is the index field of this cache?

How long is the block offset of this cache?

4. Now, using the same cache talked about in question 3, trace through the following cache accesses by keeping track of what the cache would look like after each access. Keep track of the valid bit, dirty bit, tag in the cache. You should also label each cache access as to whether that access caused a write back to the cache. If it did cause a write back, what is the tag of the memory that was written back. Also keep track of which cache access are cache misses and which are cache hits. In grading this, I will want to see the final state of the cache as well as whether each access was a hit, miss, and if it caused a write back.

1. LW 00110010

2. LW 01010110

3. LW 01000100

4. LW 10010011

5. LW 10110110

6. SW 00111100

7. LW 01011110

8. SW 01001000

9. LW 00001011

10. LW 00110011

11. LW 10110110

12. LW 10100110

13. LW 10111110

14. LW 11110011

15. SW 10100001

16. LW 01111100

17. LW 11010001

18. LW 00101101

19. LW 10110001

20. SW 00101001