3) For the circuit shown in the figure below, the Boolean expression for the output Y in terms of the inputs P, Q, R and Sis: D Do R D A) + + R + 5 B) (P+ )(R + 5) C) (P+Q)(R+S) D) P+Q+R+S 4) A full subtractor can be implemented using two 8x1 multiplexers. A) True B) False