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3. Given the following directly mapped cache table entries find the reauested information: Address Size = 7 bits Index Size 2 bits Offset Size-1 bit
3. Given the following directly mapped cache table entries find the reauested information: Address Size = 7 bits Index Size 2 bits Offset Size-1 bit Assume an empty table. Maximum Cache Size 4 a. Fill in the missing information: Address Hit/Miss Assigned IndexTag Offset 0000001 0000111 0000010 1111000 1010110 1010101 0001101 b. What does the final cache table look like? Assigned Index Tag Offset c. What is the hit/miss rate for this cache? Page 3 of 5
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