3. Memory Accesses Assume we have the following line of code: 0x2006: movl 0x0500, %edi Assume PT is at physical address 0x1000, the size of a PTE is 4 bytes, the size of each page 4KB, and the number of bits for offset is 12. Also assume we have the following page table: 8 2 3 0 4 List the physical memory accesses with paging: (1) Fetch instruction at logical address 0x2006, the vpn number is Access page table at physical address fetch the instruction at physical address to get ppn, which is Then Name: Student ID (2) Load the value to register from logical address 0x0500, the vpn number is Access page table at physical address move the value from the register to physical address 13) How manv memorv references have vou used: to get ppn, which is Then 3. Memory Accesses Assume we have the following line of code: 0x2006: movl 0x0500, %edi Assume PT is at physical address 0x1000, the size of a PTE is 4 bytes, the size of each page 4KB, and the number of bits for offset is 12. Also assume we have the following page table: 8 2 3 0 4 List the physical memory accesses with paging: (1) Fetch instruction at logical address 0x2006, the vpn number is Access page table at physical address fetch the instruction at physical address to get ppn, which is Then Name: Student ID (2) Load the value to register from logical address 0x0500, the vpn number is Access page table at physical address move the value from the register to physical address 13) How manv memorv references have vou used: to get ppn, which is Then