3. You have been enlisted to design a soda machine dispenser for your department I R lounge. Sodas are partially subsidized by the student chapter of the IEEE, so they cost only 25 cents. The machine accepts nickels, dimes, and quarters. When enough coins have been inserted, it dispenses the soda and returns any necessary change. Design an FSM controller for the soda machine. The FSM inputs are N (Nickel), D (Dime), and Q (Quarter), indicating which coin was inserted. Assume that exactly one coin is inserted on each cycle. The outputs are Dispense, RN (Return Nickel), RD (Return Dime), and RTD ( Return Two Dimes). When the FSM reaches 25 cents, it asserts Dispense and the necessary Return outputs (RN, RD, and/or RTD) required to deliver the appropriate change. Then it should return to the reset state and be ready to start accepting coins for another soda. Design a Moore FSM for your design. 3 (a) Sketch a black box of your system showing the inputs and outputs (b) Sketch the state transition diagram for the FSM (c) Design the FSM using System Verilog (type and print this part). 3. You have been enlisted to design a soda machine dispenser for your department I R lounge. Sodas are partially subsidized by the student chapter of the IEEE, so they cost only 25 cents. The machine accepts nickels, dimes, and quarters. When enough coins have been inserted, it dispenses the soda and returns any necessary change. Design an FSM controller for the soda machine. The FSM inputs are N (Nickel), D (Dime), and Q (Quarter), indicating which coin was inserted. Assume that exactly one coin is inserted on each cycle. The outputs are Dispense, RN (Return Nickel), RD (Return Dime), and RTD ( Return Two Dimes). When the FSM reaches 25 cents, it asserts Dispense and the necessary Return outputs (RN, RD, and/or RTD) required to deliver the appropriate change. Then it should return to the reset state and be ready to start accepting coins for another soda. Design a Moore FSM for your design. 3 (a) Sketch a black box of your system showing the inputs and outputs (b) Sketch the state transition diagram for the FSM (c) Design the FSM using System Verilog (type and print this part)
