@ $46.$ In binary multiplier when the lower order bit of multiplier M $=0$ Ops: A$.$ An add signal is generated B$.$ A shift signal is generated C$.$ Both add and shift signals are generated D$.$ None of these

Q $48.$ Which of the following statements can replace the sensitivity list of the "process" Ops: A$.$ O wait on B$.$ O wait for C$.$ O wait until D$.$ None of the above

Q$49.$ What strategy can be used in VHDL to handle complex state transitions with multiple input conditions? Ops: A$.$ Simplifying the state machine to reduce the number of inputs B$.$ Using a priority encoder to resolve conflicts C$.$ Implementing state transition tables or matrices D$.$ Avoiding the use of state machines.

@ $50.$ What role do programmable interconnects play in an FPGA? Ops: A$.$ They store user$-$defined logic functions. B$.$ They provide the necessary routing to connect different logic blocks. C$.$ They serve as memory elements for data storage. D$.$ They generate clock signals for synchronization.

@ $51.$ Given below the code snippet, if the clock rises at time $=10$ ns$,$ what time C is scheduled to change to G$?$ process begin wait until clk'event and clk $=\text{'}1\text{'}$; A $<=$ E after $10$ ns; B $<=$ F after $5$ ns; C$<=$ G; D $<=$ H after $5$ ns; end process; Ops: A$.10$ ns B$.20$ ns C$.15$ ns D$.$ O $(10+$ delta$)$ ns

@ $54.$ Arrival of actual edge of clock at different times at different devices due to delays is called: Ops: A$.$ Clock skew B$.$ Hazard C$.$ Slew rate D$.$ Glitch

Q $55.$ How is the bitstream loaded onto the FPGA during programming? Ops: A$.$ Using a hardware simulation tool B$.$ Using a software simulation tool C$.$ Through a programming device or configuration interface D$.$ Automatically during synthesis

@ $56.$ What is the purpose of pass transistors in FPGA SRAM programming? Ops: A$.$ To permanently connect points within the FPGA B$.$ To act as temporary switches controlled by SRAM cells C$.$ To decrease the overall power consumption of the FPGA D$.$ To store additional data beyond configuration bits