4. Assume the following instruction mix for a MIPS-like RISC instruction set: 18% stores, 22% loads, 20% branches, and 30% integer arithmetic, 5% integer shift, and 590 integer multiply. Given that loads and stores require two cycles, branches require four cycles, integer ALU instructions (including shift instructions) require on e cycle, and integer multiplies require ten cycles, compute the overall CPI. 5. Given the parameters of the previous problem, consider a compile-time optimization that converts multiplies into a sequence of shift and add instructions. For this instruction mix, 60% of the multiply instructions can be converted to shift- add sequences with an average length of six instructions. Assuming no change in clock frequency, compute the change in instructions per program, cycles per instruction, and overall program speedup due to the compiler optimization