4. Estimate the die size required for fabricating a 4x4 Braun Array multiplier in a 0.35mCMOS technology, 3LM process with 24I/O pads. (6) 5. Partition the network shown in fig.1 using the Constructive Partitioning Algorithm with logic cell E as the seed. While partitioning, take into account all the objectives shown in fig. 2. (5) - Use no more than three ASICs. - Each ASIC is to contain no more than four logic cells. - Use the minimum number of external connections for each ASIC. - Use the minimum total number of external connections. Fig. 2 - Objectives