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4 . For each of the sets of RISC-V assembly instructions below, produce a corresponding C statement. You may assume that the variables a, b,
4. For each of the sets of RISC-V assembly instructions below, produce a corresponding C statement. You may assume that the variables a, b, c, d, e, and f are stored in registers x12 x17 respectively, and the base addresses for the arrays arrA, and arrBare stored in registers x10 and x11 respectively. Some instructions may also use temporary registers x28 x31 that don't map to any variables.
a. add x29, x13, x15 addi x29, x29, 14 sub x14, x29, x12
b. slli x31, x16, 3 add x31, x11, x31 ld x12, 0(x31)
c. and x13, x15, x15 or x16, x12, x14 xori x17, x13, -1
d. sub x28, x12, x15 div x29, x17, x14 add x28, x28, x29 mul x16, x13, x28
e. sd x14, 40(x10) ld x17, 16(x10) sw x13, 80(x11) lw x15, 36(x11)
f. slli x29, x12, 3 slli x30, x13, 3 add x30, x11, x30 ld x31, 0(x30) add x30, x30, x29 ld x30, 0(x30) sub x29, x30, x31 slli x28, x14, 3 add x28, x10, x28 sd x29, 8(x28)
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