4 For the instructions sequence below:

OR R0,R2,R1 LW R3,4(R0) LW R2,0(R2) SW R3,0(R0)

ii) Find all the hazards in a five stage pipelined processor WITH and then WITHOUT Forwarding. iii) Consider the latencies from the previous question, and assume its a full pipeline (no filling and emptying), calculate the total time it will take to execute these instructions iv) To reduce the clock cycle time, we split the MEM Stage into two stages. Repeat (ii) with this six stage pipeline

R0 R1 R2 R3 L M N O

v) With above values: Which is the first value to be forwarded and which value it overrides.