4.2. The basic single-cycle MIPS implementation in Figure 1 can only implement some instructions. New instructions can be added to an existing Instructions Set Architecture (ISA), but the decision whether or not to do that depends, among other things, on the cost and complexity the proposed addition introduces into the processor datapath and control. Consider the new instruction LWI given below: Instruction: LWI Rt, Rd(Rs) Interpretation: Reg[Rt] = Mem[Reg[Rd] + Reg[Rs]] a. Which existing blocks (if any) can be used for this instruction? b. Which new functional blocks (if any) do we need for this instruction? C. What new signals do we need (if any) from the control unit to support this instruction? ontrolMemtoR Contror MemWrite Branch PCSrc ALUControl20 Funct RegDst RegWrite CLK CLK CLK WE3 RD1 WE Zero ALUResult ReadDataCh Instruction Memory A2 WD3 Register RD2 Data Memory WD WriteData File WriteReg40 PCPlus4 Signlmmm 4