5) [15] In a machine M1 clocked at 1GHz it was observed that 10% of the computation time of integer benchmarks is spent in the subroutine Multiply (A, B, C) which multiplies integer A and B and returns the result in C. Furthermore, each invocation of Multiply takes 800 cycles to execute. It is proposed to introduce a new instruction MULT to improve the performance of the machine on integer benchmarks. Please answer the following questions, if you have enough data. If there is not enough data simply answer "not enough data". a) How many times is the Multiply routine executed in the set of programs? b) An implementation of the MULT instruction is proposed for a new machine M2. MULT executes the multiplication in 40 cycles (which is an improvement over the 800 cycles needed in M1.) Besides the Multiplies, all other instructions, which were not part of the multiply routine in M1, have the same CPl in M1 and M2. Because of the added complexity however, the clock rate of M2 is 900MHz. How much faster (or slower) is M2 over M1? c) A faster hardware implementation of the MULT instruction is designed and simulated for a proposed machine M3, also clocked at 900MHz. A speedup of 10% over M1 is observed Is this possible or is there a bug in the simulator? If it is possible, how many cycles does the MULT instruction take in this new machine? If it is not possible, why is this so