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6 . < 2 . 0 pts > Given a 4 - bit Adder - Flags: C = Carry Flag, N = = Sign Flag,
pts Given a bit Adder Flags: C Carry Flag, N Sign Flag, Z Zero Flag, V Overflow Flag
a pts Briefly describe what logic gate is required to clearset the Zero flag on a bit adder.
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b pts Briefly describe the logic gate needed to clearset the overflow flag on a bit adder which bits are input to the gate
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c pts Briefly describe the logic gate needed to clearset the carry flag on a bit adder. Hint: it is not just the carry out of bit #
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d pts Which SUM bit should connect to the sign flag on the bit adder?
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