6- Find the hazards that may occur when the following commands in a MIPS processor with 5 steps (IF, ID, EX, MEM, WB) for Pipeline and a separate ALU for each of the Add / Sub, Mul, Div operations. (Consider that all instructions are1 cycle and data forwarding is exist.) Inst-1: int add (R1, R1, R2) Inst-2: int_mult (R1, R3, R4) Inst-3: int add (R2, R3, R1) Inst-4: int add (R4, R2, R1) a) none of these RAW between inst-2&inst-3 all of these RAW between inst-1&inst-3 RAW between inst-2&inst-4 f)O RAW between inst-3&inst-4 Leave blank