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6. It is the preset condition for a ring shift counter; A ring shift counter is a counter in which the output of one FF

6. It is the preset condition for a ring shift counter; A ring shift counter is a counter in which the output of one FF connected to the input of the adjacent FF. In preset condition, all of the bits are 0 except first one.

7. The characteristic of a shift register; There has to be an output, be it serial or parallel.

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