7. (9 marks) Sita is a newly joined computer architect who is assigned to a processor design team. The team is working on a next generation processor for deepest learning workloads. The processor has 5 stages in the pipeline: IF.ID/RF, EX, MEM, WB. Branches can effectively be completed at the end of the second stage. She is designing a branch predictor for the processor, and needs your expert help. . Would you recommend her to talk to Lakshmana who works in the workload (user programs) analysis team? If yes, what information does she need to collect from him? (1) Would you recommend her to discuss with Rama who works in the compiler team? If yes, what are the discussion points in the meeting with him? (1) . Would you recommend her to implement dynamic branch prediction? If yes, why? If no, why not? (1) Hanuman the machine learning expert has a branch predictor designed which has a very high prediction accuracy (10% more accurate than Sita's current design). It has a 4096-entry buffer with each entry consuming 64 bytes. Should Sita incorporate Hanuman's design? If yes, why? If no, why not? (1) Ravana from the hardware design team says there is limited space and power available 2 for the branch predictor. Help Sita finalise the branch predictor design. Also, help her to calculate the space (in bytes) needed for her branch predictor, and convince Ravana that the branch predictor is power efficient. (3) Sita needs to deliver a presentation to the management and marketing team headed by Kumbhkarna. She has 1 slide with 3 lines space to convince the MM team to let the processor team incorporate her branch predictor design. What do you recommend to be filled in those 3 lines? (2)