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7. Assume an architecture that uses base and limit register for memory management. The memory manager uses variable sized partition allocation. The current memory allocation

7. Assume an architecture that uses base and limit register for memory management. The memory manager uses variable sized partition allocation. The current memory allocation is as shown below.

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There is a new memory request for 9 Kbytes. Can this allocation be satisfied? If not why not? What is the amount of external fragmentation represented by the above figure?

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8. What is the relationship between page size and frame size in a paged memory system?

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9. In terms of hardware resources needed (number of new processor registers and additional circuitry to generate the physical memory address given a CPU generated address) compare base and limit register solution with a paged virtual memory solution.

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10. Please answer the following question upon the figure shown in the following about page table,

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1) What are the page number, and offset?

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2) What is the corresponding frame number?

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Allocation table Start address 8K 11K 13K Size 8K 3K 2K 2K Process FREE FREE Memory 8K 3K (P3) 2K (P4)

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