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7. The gate structure for four pixels of a certain orthogonal transfer CCD is sketched at below. Propose a pattern for (a) assigning gate voltages

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7. The gate structure for four pixels of a certain orthogonal transfer CCD is sketched at below. Propose a pattern for (a) assigning gate voltages during collection, (b)a method for clocking voltages for a one-pixel shift to the right, and (c) a method for clocking voltages for a one-pixel shift downwards. Gates with the same numbers are wired together. 7. The gate structure for four pixels of a certain orthogonal transfer CCD is sketched at below. Propose a pattern for (a) assigning gate voltages during collection, (b)a method for clocking voltages for a one-pixel shift to the right, and (c) a method for clocking voltages for a one-pixel shift downwards. Gates with the same numbers are wired together

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