7.29 2 level and 3 level but not nor, NAND solution instead

7.28 fla, b, c, d, e)- I m(2, 3, 6, 12, 13, 16, 17, 18, 19, 22, 24, 25, 27, 28, 29, 3 (a) Find a minimum two-level NOR-gate circuit to realize f. (b) Find a minimum three-level NOR-gate circuit to realize f. 7.29 Design a minimum three-level NOR-gate circuit to realize f- a'b' + abd +acd 7.30 Find a minimum four-level NAND- or NOR-gate circuit to realize (a) Z- abe'f+ c'e'f+ d'ef+ gh (b) Z - (a' +b'tetc' + a' + b)d+ a' +bg+ h) 7.31 Implement abde' + a'b'+ c using four NOR gates. 7.32 Implement x'yz + xvyw'+ xvy'' using a three-level NAND-gate circu