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7.39 Consider the following code: LDR r1, [r6] ; Load r1 from memory. R6 is a pointer ADD r1, r1, #1 ; Increment r1 by

7.39 Consider the following code: LDR r1, [r6] ; Load r1 from memory. R6 is a pointer ADD r1, r1, #1 ; Increment r1 by 1 LDR r2, [r6, #4] ; Load r2 from memory ADD r2, r2, #1 ; Increment r2 by 1 ADD r3, r1, r2 ; Add r1 and r2 with total in r3 ADD r8, r8, #4 ; Increment r8 by 4 STR r2, [r6, #8] ; Store r2 in memory SUB r2, r2, #64 ; Subtract 64 from r2 The processor has a five-stage pipeline F O E M S; that is, instruction fetch, operand fetch, operand execute, memory, and operand writeback to register file. a. How many cycles does this code take to execute assuming internal forwarding is not used? b. How many cycles does this code take to execute assuming internal forwarding is used? c. How many cycles does the code take to execute assuming that it is reordered (no internal forwarding)? d. How many cycles does the code take to execute assuming reordering and internal forwarding?

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