8. [18 points] Suppose we have a memory and a direct-mapped cache with the following characteristics. Memory is byte addressable O Memory addresses are 16 bits O The cache has 8 blocks O Each cache block holds 16 bytes of data a) [3 points] In the spaces below, indicate how the 16 address bits are allocated to the offset, offset bit:s index, and tag parts of the address used to reference the cache: tag bits [12 points] Below is a sequence of four binary memory addresses in the order they are used to reference memory. Assume that the cache is initially empty. For each reference, write dow?n the tag and index bits and circle either hit or miss to indicate whether that reference is a hit or a miss index bits. b) Memory address Tag Index Hit/Miss (circle) Hit Hit Hit Hit Miss Miss Miss Miss 0010 1101 1011 0011 0010 1101 1011 1000 1010 1010 1010 1011 [3 points] Suppose the cache access time is 15ns, main memory access time is 220ns, and the cache hit rate is 95%. Assuming parallel (overlapped) access (CPU starts the data request in parallel to both cache and to main memory at the same, so if a cache missing occurs, we don't have to add this cache search time to the memory access), what is the average access time for the processor to access an item? c)