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[8] 3. The following is a very incomplete sequential circuit that takes in a sequence of unsigned 8-bit integers xi, T2, ..., Xn (it uses

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[8] 3. The following is a very incomplete sequential circuit that takes in a sequence of unsigned 8-bit integers xi, T2, ..., Xn (it uses the values present at the input every time the clock ticks). It should output the value xi-Z2 +Zg-Eq +5" . Complete the circuit so it behaves according to this description; do not worry about overflow. Hint: our solution uses one flip-lop, one adder and some other simpler components (gates, constants, etc). Register 90010000- Input Output

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