8. Consider a demand paging virtual memory system with 24 bit virtual address space, page size is (8KB or 2413) and the system has 8 MB of main memory. Assume the page table is single level and stored in memory. When we split a logical address into page number and offset within the page, how many bits are used for the page number, and how many bits are used for the offset? a. b. Assuming page table entries are 4 bytes each and a single level page table is used, how many bytes are required to store a page table? frames are left for demand paging? d. Suppose at some point in time our TLB contains the entries: Page # Frame # Valid? 10 6 4 The user attempts to access the logical address 0000 0000 1010 1011 0011 0100. Is this a TLB miss? Briefly explain e. What is the physical address