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8. instruction is used to get the 1 's complement of the operand. A) CMP B) BIC A)Thelowerorder8bitsoftheinstructionC)Thelowerorder4bitsoftheinstructionB)Thehigherorder4bitsoftheinstruetiond)Thehigherorder8bitsoftheinstruction 10. The BEQ instructions is used A)

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8. instruction is used to get the 1 's complement of the operand. A) CMP B) BIC A)Thelowerorder8bitsoftheinstructionC)Thelowerorder4bitsoftheinstructionB)Thehigherorder4bitsoftheinstruetiond)Thehigherorder8bitsoftheinstruction 10. The BEQ instructions is used A) To check the equality condition between the operands and then branch B) To check if the Operand is greater than the condition value and then branch C) To check if the flag Z is set to 1 and then causes branch. D) None of the mentioned 11. Random Access Memory (RAM) implies that the memory access time depends on the data location. A.True B. False 12. Little endian system stores the least significant byte of the word at the smallest memory address A. True B. Faise 13. The Effective Address (EA) of the instruction written in Post-indexed mode, LDR Rn, [Rm], 2 is: A) EA=[Rn] B) EA=[Rn+Rm] C) EA=[Rm] D) EA=[Rm]+Rn 14. How many bits are required to specify the Register operands in an ARM instruction? A. 32 bits B. 16 bits C. 4 bits D. 2 bits

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