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8) The following multiple switching functions are to be implemented using a single decoder and OR gates: f1=3m(1, 2, 8, 10, 14) f2-2m (2,3,5, 9,
8) The following multiple switching functions are to be implemented using a single decoder and OR gates: f1=3m(1, 2, 8, 10, 14) f2-2m (2,3,5, 9, 15) f3 Im (0, 2, 4, 5, 6, 7) Which of the following is the minimum configuration of decoder needed? a. 2 to 4 line b. 3 to 8 line c. 4 to 16 line d. 5 to 32 line
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