9. (5 points) Design a half adder circuit using the minimum number of 2:4 active high output decoders and the minimum number of any additional necessary logic gates. a. Specify the minimum number of 2:4 decoders needed to implement the half adder. b. Build the truth table of the half adder. c. Derive the minterms expansion of each output of the half adder. d. Plot the circuit using the minimum number of 2:4 active high output decoders and the minimum number of any additional necessary logic gates.