9- The following register transfers are to be executed in the system of Fig. 5-4. for each transfer, use the following table to specify: (1) the binary value that must be applied to the bus select inputs S2, S1, and SO; (2) the register whose LD control input must be active (if any); (3) a memory control read or write operation (if needed). a. TR POC b.MIAR] IR C. AC ? DR. PC ? AC (done simultaneously) Complete the following table; S20Load(LD) lemory control RTL a TR-PC