A cache has 1024 KB capacity, 256-byte lines (i.e., blocks) and is 2-way set-associative. The processor using the cache is a 32-bit processor (i.e., the addresses are 32-bits wide). (Use 1K=2¹⁰.)

How many lines and sets does the cache have?

What is the total number of entries are required in the Tag array lookup table used to determine hit/miss?

How many bits of Tag are required in each entry in the Tag array?