A cache has a 64 KB capacity, 128 -byte lines (blocks), and is 4 -way set associative. The system containing the cache uses 32 -bit addresses. (a) How many lines (blocks) and sets does the cache have? (b) How many entries are required in the tag array? (c) How many bits of tag are required in each entry in the tag array? (d) If the cache is write-through, how many bits are required for each entry in the tag array, and how much total storage is required for the tag array if an LRU replacement policy is used?