Question
A computer that has 16-bit memory addresses, 64-byte blocks/lines and a direct-mapped cache of 32 lines. The offset, line number, and tag are as follows:
A computer that has 16-bit memory addresses, 64-byte blocks/lines and a direct-mapped cache of 32 lines.
The offset, line number, and tag are as follows: Offset: 64 = 2^6 = 6 bits Line Number: 32 = 2^5 = 5 bits Tag: 5 bits
Suppose the state of the cache is initially as shown below.
Line | Tag | Line | Tag | Line | Tag | Line | Tag |
---|---|---|---|---|---|---|---|
0 | 04 | 8 | 17 | 10 | 0B | 18 | 05 |
1 | 13 | 9 | 13 | 11 | 10 | 19 | 0E |
2 | 10 | A | 18 | 12 | 14 | 1A | 04 |
3 | 0E | B | 06 | 13 | 19 | 1B | 1D |
4 | 1F | C | 08 | 14 | 11 | 1C | 06 |
5 | 12 | D | 17 | 15 | 13 | 1D | 0A |
6 | 07 | E | 0B | 16 | 06 | 1E | 1B |
7 | 02 | F | 02 | 17 | 0F | 1F | 15 |
For each memory address, write the offset, line number, and tag in hexadecimal, and whether accessing it would be a hit or a miss according to the cache state shown above. (We are not actually accessing any of them, so assume the cache contents will not change from part to part.)
- 0x39A7
- 0x5BB7
- 0xE13C
- 0x6C9A
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