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A digital system is modelled by the RTL code in Listing Q1. Assume that a, b and c are external inputs, and the registers

A digital system is modelled by the RTL code in Listing Q1. Assume that a, b and c are external inputs, and the registers are positive-edge triggered. By using the ALU with the functions given in Table Q1, answer the following questions. Note that m* denotes m bitwise inverted. SO: () /R1 b; Table Q1: ALU operation (a) ( ) /R2 C fifo output function S1: ( ) /R2 R1 R2; 00 X+Y ADD ( ) /R1a; 01 X-Y SUB S2: (m) /R2

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