A.) Generate the list of minterms and conditions it does not matter that they correspond to you, based on the script attached in the annex of this file.

Its minterms in 1 to use are: [27, 14, 22, 20, 1, 11, 25, 28, 8, 6, 26, 19]
Its X conditions to use are: [16, 4, 3, 31, 15, 24, 2, 12]B.)

Based on this function obtained in point A, carry out the implementation of a verilog module that describes the expression. This should be without minimizations.
C.) Perform the minimization of the expression obtained in point A, using maps of Karnaugh. Based on this minimization, make a module in verilog that describes the expression obtained.
D.) Both the module designed in points B and C must have identical outputs. Verify this by creating a benchmark enough to check, the check should be displayed both at the console as with timing diagrams displayed with gtkwave software.