a) (i) Implement 64: 1 multiplexer with four 16: 1 and one 4: 1 multiplexer. (ii) Design 1: 16 demux using as many '2 times 4 decoder with enable' as you like and one 2 times 4 decoder without enable (Use only block diagrams) b) Perform the following arithmetic using 7 bit two's complement and comment whether overflow has occurred or not? (+27) + (-61) (-27) + (+61) (-27) + (-61) c) Determine the decimal value of the 7-bit binary number (1001100) when interpreted as