Answered step by step
Verified Expert Solution
Link Copied!

Question

1 Approved Answer

A k-way set associative cache consists of 128 lines divided into four-line sets. M 64K blocks of 16 bytes each. i. What is k? (1

image text in transcribed
A k-way set associative cache consists of 128 lines divided into four-line sets. M 64K blocks of 16 bytes each. i. What is k? (1 point) ii. What is the format of main memory address? (4 points) ii. What is the size of the cache in bytes? (2 points) 16 For the same size cache and block size as part (a), what would be the format of main memory address if direct cache is to be designed? b. 16 e. Design a 32-bit memory of total capacity 32768 bits using SRAM chips of size 64x4. Give the array configuration of the chips on the memory board showing all input and output signals for assigning this to the lowest address. The design should allow byte, word and double word accesses

Step by Step Solution

There are 3 Steps involved in it

Step: 1

blur-text-image

Get Instant Access to Expert-Tailored Solutions

See step-by-step solutions with expert insights and AI powered tools for academic success

Step: 2

blur-text-image_2

Step: 3

blur-text-image_3

Ace Your Homework with AI

Get the answers you need in no time with our AI-driven, step-by-step assistance

Get Started

Recommended Textbook for

More Books

Students also viewed these Databases questions

Question

What are the steps the EEOC uses in investigating a charge? P968

Answered: 1 week ago

Question

b. Compute the mean value of this distribution.

Answered: 1 week ago