+A NAND gate with eight inputs is required. For each of the following cases, minimize the number of gates used in the multiple-level result: (a)
+A NAND gate with eight inputs is required. For each of the following cases, minimize the number of gates used in the multiple-level result:
(a) Design the 8-input NAND gate using 2-input NAND gates and NOT gates.
(b) Design the 8-input NAND gate using 2-input NAND gates, 2-input NOR gates, and NOT gates only if needed.
(c) Compare the number of gates used in (a) and (b).
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Authors: Paul D. Kimmel, Jerry J. Weygandt, Donald E. Kieso
6th Edition
978-1119191674, 047053477X, 111919167X, 978-0470534779
