A processor executes an instruction in the following six stages. Taken separately, the time required by each stage in picoseconds (1,000 ps = 1 ns) is given for each stage.

IF instruction fetch (300ps)

ID Instruction decode (150ps)

OF Operand fetch (250ps)

OE Execute (350ps)

MA Memory access (700ps)

OS Operand store (writeback) (200ps)

a. What is the total time required to execute an instruction if the processor is not pipelined? What is the rate of instructions completed per millisecond?

b. What is the total time required to execute an instruction assuming that this datapath is pipelined in six stages, and that a pipeline overhead of 20ps per stage is required in order to implement pipeline latches? Once this pipeline is full, what is the rate of instructions completed per millisecond?

c. Suppose that 25% of instructions are branch instructions, and half of the time a branch instruction causes a 3 cycle penalty (due to misprediction). What is the resulting average effective instruction execute time? what is the resulting instruction rate?

Question 2

In Question 7.18, we see a datapath subdivided into 6 sequential stages, with a pipeline overhead of tau=20ps

You are asked to re-design the pipeline to optimize for branch and data hazards. You decide that you might be able to do this by combining adjacent stages together to reduce the total number of stages. For example, you can make a 2-stage pipeline by combining IF, ID, OF and OE into a single stage of 1050+20 ps; and M and OS in a second stage which takes 900+20 ps too execute. The clock speed for this new arrangement of the pipeline would therefore be 1070 ps (the time delay of the longest stage)

Find the best 3-stage, 4-stage, and 5-stage pipeline using the existing stages (which must remain in order), combining adjacent stages as you can.

Determine the clock speed and instruction execution time of each pipeline; compare these to the unpipelined clock speed and execution time, and indicate the likely branch and data hazard penalties for each pipeline.