A RAM chip has a capacity of $1024$ words of $8$ bits each $(1K8).$ Find the number of $24$

decoders with enable lines needed to construct a $16K16$RAM from $1K8$RAM.

State True or False the following statements and justify with ONE$-$line$/$paragraph statement

or appropriate examples $($No marks without valid justification$)$

a$)$ The execute phase retrieves an instruction from memory based on the address in the

Program Counter.

b$)$ The instruction cycle in the von Neumann architecture includes only fetch and

execute phases.

c$)$ The von Neumann bottleneck refers to the excess in throughput caused by the shared

memory and data bus.

d$)$ During the fetch phase, the CPU carries out the actions required by the instruction.

e$)$ In the von Neumann architecture, instructions are executed sequentially irrespective

of jump or branch instruction that has no effect on the flow.