A set-associative cache consists of 64 lines, or slots, divided into four-line sets. Main memory contains 4K blocks of 128 words each. Show the format of main memory addresses.

This is a 4-way set associative cache, because we have 4 choices for where to put items in each set. Its as if we had 16 direct-mapped caches, each with 4 entries. So its 16 sets x 4 lines/set = 64 lines. Because the computer always deals in words, not just bytes, everything we do in cache is built around the size of the CPUs registers, which is the same as its bit architecture. Assuming this is a 32-bit architecture (which if you already understand why this cannot possibly be true, please pretend its OK for now), when we go to memory (including cache), were always dealing with 32 bits of data at a time. Thats our smallest unit of data well pull towards the CPU or receive from the CPU. However, our RAM is built around bits, 8 bits each. How many bits are needed to track the number of bytes that span 32 bits? Calculate TAG, SET, WORD, and OFFSET