(a) Suppose a PC has a 64-bit system (i.e., memory) bus. Determine the number of 64M4 SDRAM chips required to implement a single 512MB DIMM.

(b) What would be the required burst length if L2 cache block size is 64 bytes?

(c) If 512MB DIMM is referred to as PC3200, what is the clock rate of the system or memory bus?

(d) Determine the number of 512MB DIMMs required to implement 1 GB of main memory and show the address mapping for 32-bit physical address by indicating Rank ID, Bank ID, Row ID, and Column ID fields and the numbers of bits required for each field.

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