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A system with one input X and one output Z is to be designed such that Z = 1 if and only if X has

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A system with one input X and one output Z is to be designed such that Z = 1 if and only if X has been 1 for at least three consecutive clock sequence. (a) Construct the Moore and Mealy model state diagram for the system above. (6) Compare the behavior of the Moore and Mealy models by drawing the output in the timing diagram shown in Figure 2. Clook on 1 1 1 1 . 1 1 1 1 . ! . . 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Moore output Mealy output

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