A toggle flip flop (which changes its output at every positive clock edge) can be con- structed by feeding the output of a D flip flop to its D input. Give the logic diagram for a toggle flip flop with asynchronous reset, using NOR gates, inverters and pass gates. A "Sea of Gates" semi-custom logic chip contains re- peated instances of 3-pairs and 2-pairs as shown on the right. Show the interconnection diagram which should be used to implement a toggle flip flop with asynchronous clear using two 3-pair and two 2-pair structures. 3-pair 0 2-pair Connections permitted only at terminals marked by symbols shown as 9,oro Metal cross overs are allowed.